SEMICONDUCTOR TECHNOLOGY

Experts for all circumstances

The semiconductor sector has shown to be particularly strongly affected by economic fluctuations. While cutting costs is generally a priority during downturns, finding well-qualified experts is a challenge when things are looking up. But whatever the outlook – ALTRAN Technologies can provide valuable assistance in both scenarios.

Process optimisation along the entire value chain, for instance, as well as certified project management help identify and eliminate unnecessary costs. Experienced specialists cover the entire range of IC development, from Full-Custom Layout to Verification through VHDL design (Very high speed integrated circuit Hardware Description Language), Place & Route and STA (Static Timing Analysis). The objectives are clear: maximum quality, on-time delivery and the best possible cost optimisation.

Better layouts for better ICs

Dealing with Full-Custom Layouts naturally demands rapid familiarisation with the idiosyncrasies of the customer's technology. There are many opportunities for optimisation: compact layouts save space, DfM measures (Design for Manufacturability) optimise yield, and scripts (such as "Skill") improve reliability and speed up operation. Finally, optimum adaptation of the DRC (Design Rule Check) and LVS (Layout Versus Schematic) runsets to the customer's requirements prevents wrong errors and warnings during layout verification. This rounds off the range of services ALTRAN Technologies offers in this area and has proved a great success with our customers.

Top design & high quality

It takes many steps to proceed from the idea to the fully verified design, and they all need to be performed to the highest quality standards. The specification must not allow for any inconsistencies or ambiguities. Interfaces must be defined in detail at an early stage to ensure verification can take place on time. The design is implemented carefully – using VHDL for instance – and fully documented, especially by comments in the actual code. Finally, the designer will achieve coverage of at least 95% during simulation before handing the work over for verification.

Detailed plans are created on the basis of the specification for verification at module level and top level. The verification achieves 100% coverage, not only for statements and branches, but also for conditions, expressions and toggles. Bugs are entered on a database so that they can be tracked until remedied. Automating the verification process itself through regression tests enables fast redesign cycles. The coding style and the verification style are double-checked in two peer review sessions. Comprehensive documentation ultimately enables a smooth and straightforward handover to the customer.

Contact

ALTRAN Technologies
Division Innovation

Berhard-Wicki-Straße 3
80636 München

Tel. +49 (0) 89 544 556-0
Fax +49 (0) 89 544 556-20